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lt1011/lt1011a 1 1011afe for more information www.linear.com/lt1011 overdrive (mv) 0.1 200 response time (ns) 250 300 350 400 1 10 100 1011 ta02 150 100 50 0 450 500 falling output rising output 10s 12-bit a/d converter response time vs overdrive typical a pplica t ion descrip t ion voltage comparator the lt ? 1011 is a general purpose comparator with sig- nificantly better input characteristics than the lm111. although pin compatible with the lm111, it offers four times lower bias current, six times lower offset voltage and five times higher voltage gain. offset voltage drift, a previously unspecified parameter, is guaranteed at 15v/c. additionally, the supply current is lower by a factor of two with no loss in speed. the lt1011 is several times faster than the lm111 when subjected to large overdrive conditions. it is also fully specified for dc parameters and response time when operating on a single 5v supply. the lt1011 retains all the versatile features of the lm111, including single 3 v to 18 v supply operation, and a floating transistor output with 50 ma source/sink capability. it can drive loads referenced to ground, nega- tive supply or positive supply, and is specified up to 50v between v C and the collector output. a differential input voltage up to the full supply voltage is allowed, even with 18v supplies, enabling the inputs to be clamped to the supplies with simple diode clamps. fea t ures a pplica t ions n pin compatible with lm111 series devices n guaranteed max 0.5mv input offset v oltage n guaranteed max 25na input bias current n guaranteed max 3na input offset current n guaranteed max 250ns response t ime n guaranteed min 200,000 v oltage gain n 50 ma output current source or sink n 30 v differential input voltage n fully specified for single 5v operation n available in 8-lead pdip and so packages n sar a/d converters n voltage-to-frequency converters n precision rc oscillator n peak detector n motor speed control n pulse generator n relay/lamp driver 6012 12-bit d/a converter parallel outputs parallel outputs *r2 and r4 should tc track r6 820 r3 6.98k r2* 6.49k r1 1k full-scale trim lm329 7v r4* 2.49k r5 1k 0.001f ?15v 3.9k 15v 15v 5v serial output input 0v to 10v 5v 7475 latch am2504 sar register start clock f = 1.4mhz 1011 ta01 s cp d cc s e ? + lt1011a l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners.
lt1011/lt1011a 2 1011afe for more information www.linear.com/lt1011 a bsolu t e maxi m u m r a t ings (note 1) supply voltage ( pin 8 to pin 4) ................................. 36 v o utput to negative supply ( pin 7 to pin 4) lt 1011 ac , lt 1011 c ............................................... 40 v lt 1 011 ai , lt 1011 i ................................................. 40 v lt 1 011 am , lt 1011 m ( obsolete ) ........................ 50 v ground to negative supply ( pin 1 to pin 4) .............. 30 v d ifferential input voltage ........................................ 3 6 v voltage at strobe pin ( pin 6 to pin 8) ....................... 5 v input voltage ( note 2) .......................... e qual to supplies output short - circuit duration ............................... 10 sec operating temperature range ( note 3) lt 1011 ac , lt 1011 c .................................. 0 c to 70 c lt 1011 ai , lt 1011 i ................................ C 40 c to 85 c lt 1011 am , lt 1011 m ( obsolete ) ..... C55 c to 125 c storage temperature range .................. C 65 c to 150 c lead temperature ( soldering , 10 sec ) ................... 30 0 c p in c on f igura t ion top view output v + gnd input + balance/ strobe balance input ? v ? 8 7 6 5 3 2 1 4 h package 8-lead to-5 metal can + ? t jmax = 150c, ja = 150c/w, jc = 45c/w obsolete package consider the n8 or s8 packages for alternate source 1 2 3 4 8 7 6 5 top view gnd input + input ? v ? v + output balance s8 package 8-lead plastic so n8 package 8-lead pdip balance/ strobe + ? t jmax = 150c, ja = 130c/w(n8) t jmax = 150c, ja = 150c/w(s8)
lt1011/lt1011a 3 1011afe for more information www.linear.com/lt1011 o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range lt1011acn8#pbf n/a lt1011 8-lead plastic dip 0c to 70c lt1011cn8#pbf n/a lt1011 8-lead plastic dip 0c to 70c lt1011ais8#pbf lt1011ais8#trpbf 1011ai 8-lead plastic so C40c to 85c lt1011cs8#pbf lt1011cs8#trpbf 1011 8-lead plastic so 0c to 70c lt1011is8#pbf lt1011is8#trpbf 1011i 8-lead plastic so C40c to 85c obsolete packages lt1011ach#pbf n/a 8-lead to-5 metal can C55c to 125c lt1011ch#pbf n/a 8-lead to-5 metal can C55c to 125c lt1011amh#pbf n/a 8-lead to-5 metal can C55c to 125c lt1011mh#pbf n/a 8-lead to-5 metal can C55c to 125c lt1011acj8#pbf n/a 8-lead cerdip C55c to 125c lt1011cj8#pbf n/a 8-lead cerdip C55c to 125c lt1011amj8#pbf n/a 8-lead cerdip C55c to 125c lt1011mj8#pbf n/a 8-lead cerdip C55c to 125c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult lt c marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
lt1011/lt1011a 4 1011afe for more information www.linear.com/lt1011 e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: inputs may be clamped to supplies with diodes so that maximum input voltage actually exceeds supply voltage by one diode drop. see input protection in the applications information section. note 3: t jmax = 150c. note 4: output is sinking 1.5ma with v out = 0v. note 5: these specifications apply for all supply voltages from a single 5v to 15v, the entire input voltage range, and for both high and low output states. the high state is i sink = 100a, v out = (v + C 1v) and the low state is i sink = 8ma, v out = 0.8v. therefore, this specification the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v s = 15v, v cm = 0v, r s = 0, v gnd = C15v, output at pin 7 unless otherwise noted. symbol parameter conditions lt1011ac/ai/am lt1011c/i/m units min typ max min typ max v os input offset voltage (note 4) 0.3 0.5 1 0.6 1.5 3 mv mv *input offset voltage r s 50k (note 5) 0.75 1.5 2 3 mv mv i os *input offset current (note 5) 0.2 3 5 0.2 4 6 na na i b input bias current (note 4) 15 25 20 50 na *input bias current (note 5) 20 35 50 25 65 80 na na ?v os ?t input offset v oltage drift (note 6) t min t t max 4 15 4 25 v/c a vol *large-signal voltage gain r l = 1k connected to 15v, C10v v out 14.5v 200 500 200 500 v/mv r l = 500 connected to 5v, v s = single 5v, v gnd = 0v, 0.5v v out 4.5v 50 300 50 300 v/mv cmrr common mode rejection ratio 94 115 90 115 db *input voltage range (note 9) v s = 15v v s = single 5v C14.5 0.5 13 3 C14.5 0.5 13 3 v v t d *response time (note 7) 150 250 150 250 ns v ol *output saturation voltage, v gnd = 0 v in = C5mv, i sink = 8ma, t j 100c v in = C5mv, i sink = 8ma v in = C5mv, i sink = 50ma 0.25 0.25 0.7 0.4 0.45 1.5 0.25 0.25 0.7 0.4 0.45 1.5 v v v *output leakage current v in = 5mv, v gnd = C15v, v out = 20v 0.2 10 500 0.2 10 500 na na *positive supply current v gnd = 0 3.2 4 3.2 4 ma *negative supply current v gnd = 0 1.7 2.5 1.7 2.5 ma *strobe current (note 8) minimum to ensure output transistor is off, v gnd = 0 500 500 a input capacitance 6 6 pf *indicates parameters which are guaranteed for all supply voltages, including a single 5v supply. see note 5. defines a worst-case error band that includes effects due to common mode signals, voltage gain and output load. note 6: drift is calculated by dividing the offset voltage difference measured at min and max temperatures by the temperature difference. note 7: response time is measured with a 100mv step and 5mv overdrive. the output load is a 500 resistor tied to 5v. time measurement is taken when the output crosses 1.4v. note 8: do not short the strobe pin to ground. it should be current driven at 3ma to 5ma for the shortest strobe time. currents as low as 500a will strobe the lt1011a if speed is not important. external leakage on the strobe pin in excess of 0.2a when the strobe is off can cause offset voltage shifts. note 9: see graph input offset voltage vs common mode voltage.
lt1011/lt1011a 5 1011afe for more information www.linear.com/lt1011 temperature (c) ?50 current (na) 25 30 35 50 75 100 125 150 1011 g01 20 15 0 ?25 0 25 5 10 45 40 i b flows out of inputs temperature (c) ?50 current (na) 0.5 0.6 0.7 50 75 100 125 150 1011 g02 0.4 0.3 0 ?25 0 25 0.1 0.2 0.9 0.8 source resistance () 1k 0.1 equivalent offset voltage (mv) 1 10 100 10k 100k 1m 1011 g03 lm311 (for comparison) lt1011m lt1011c lt1011am lt1011ac typical p er f or m ance c harac t eris t ics input characteristics* common mode limits transfer function (gain) response timecollector output response timecollector output collector output saturation voltage input bias current input offset current worst-case offset error input voltage (v) ?20 input current (na) ?15 ?10 ?5 0 5 10 15 20 1011 g04 ?20 ?25 ?40 ?15 ?10 ?5 ?35 ?30 5 0 *either input. remaining input grounded. current flows out of input. v s = 15v temperature (c) ?50 common mode voltage (v) ?2.0 ?1.5 ?1.0 50 75 100 125 150 1011 g05 0.4 0.3 v ? ?25 0 25 0.1 0.2 v + ?0.5 referred to supplies positive limit negative limit differential input voltage (mv) ? 0.5 30 40 50 0.3 1011 g06 20 output voltage (v) 10 0 ?0.3 ?0.1 0.1 0.5 t a = 25c collector output r l = 1k emitter output r l = 600 time (ns) 0 2 4 6 350 1011 g07 0 100mv 1 3 5 0 50 100 150 250 300 400 200 450 v s = 15v 5mv 2mv overdrive 20mv input = 100mv step 15v 5v 500 v in ?15v ? + time (ns) 0 2 4 6 350 1011 g08 0 0 1 3 5 ?100mv 50 100 150 250 300 400 200 450 v s = 15v 5mv 2mv overdrive 20mv input = 100mv step 15v 5v 500 v in ?15v ? + sink current (ma) saturation voltage (v) 50 0.6 0.8 1.0 40 1011 g09 0.4 0.3 0.2 0.5 0.7 0.9 0.1 0 10 15 20 30 35 45 25 50 pin 1 grounded t a = 125c t a = ?55c t a = 25c
lt1011/lt1011a 6 1011afe for more information www.linear.com/lt1011 typical p er f or m ance c harac t eris t ics supply current vs supply voltage supply current vs temperature output leakage current output saturation ground output output saturation voltage response time vs input step size response time using gnd pin as output response time using gnd pin as output output limiting characteristics* time (s) 0 input voltage (mv) output voltage (v) 0 10 15 2 4 1011 g10 ?100 0 ?10 ?50 5 ?5 ?15 1 3 20mv 5mv 2mv v s = 15v t a = 25c 2k v out v in v ? v + ? + time (s) 0 input voltage (mv) output voltage (v) ?100 10 15 2 4 1011 g11 0 0 ?10 ?50 5 ?5 ?15 1 3 20mv v s = 15v t a = 25c 5mv 2mv 2k v out v in v ? v + ? + output voltage (v) 0 0 20 40 60 80 100 120 140 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 1011 g12 5 10 15 short-circuit current (ma) power dissipation (w) short-circuit current *measured 3 minutes after short power dissipation t a = 25c supply voltage (v) 0 0 current (ma) 1 2 3 4 5 5 10 15 20 1011 g13 25 30 positive supply collector output ?lo? positive and negative supply collector output ?hi? temperature (?c) ?50 current (ma) 4 5 6 25 75 1011 g14 3 2 ?25 0 50 100 125 1 0 positive supply collector output ?lo? positive and negative supply collector output ?hi? temperature (c) 10 ?10 leakage current (a) 10 ?9 10 ?8 10 ?7 25 65 85 105 10 ?11 45 125 1011 g15 v s = 15v v out = 35v v gnd = ?15v output current (ma) 0 v + to ground pin voltage (v) 3 4 5 40 1011 g16 2 1 0 10 20 30 50 t j = 125c t j = 25c t j = ?55c referred to v + 2 3 4 1 7 8 v + v ? r l v out + + ? lt1011 input overdrive (mv) 0 0 saturation voltage (v) 0.1 0.2 0.3 0.4 2 4 6 8 1011 g17 0.5 0.6 1 3 5 7 i sink = 8ma t j = 125c t j = 25c t j = ?55c input step (v) 0 propagation delay (ns) 600 800 1000 8 1011 g18 400 200 0 2 4 6 1 9 3 5 7 10 v s = 15v r l = 500 to 5v overdrive = 5mv ? + 3 input 500 2 1 7 5v rising input falling input
lt1011/lt1011a 7 1011afe for more information www.linear.com/lt1011 common mode voltage (v) v ? v + input offset voltage (mv) 0.5 1.5 2.5 1011 g19 ?0.5 ?1.5 0 1.0 2.0 ?1.0 ?2.0 ?2.5 0.1 0.2 0.3 0.4 0.5 0.6 0.7 t j = 25c upper common mode limit = v + ? (1.5v) v ? (or gnd with single supply) temperature (c) ?50 ?25 change in v os (mv/a) 0 0.2 0.4 75 100 125 150 1011 g20 ?150mv ?100mv ?50mv 0 0 25 50 0.8 0.6 change in v os for current into pins 5 or 6 voltage on pins 5 and 6 with respect to v + typical p er f or m ance c harac t eris t ics input offset voltage vs common mode voltage offset pin characteristics p in func t ions gnd (pin 1): ground. input + (pin 2): non-inverting input of comparator input C (pin 3): inverting input of comparator v C (pin 4): negative supply voltage out (pin 7): open-collector output of comparator balance (pin 5): balance input. this input can be used to adjust the input voltage offset or to add hysteresis. if offset balancing or hysteresis is not used, the balance pins should be connected together with a 0.1 f capacitor. balance/strobe (pin 6): strobe input pin. using this pin, the output transistor can be forced to an off state, giving a hi output at the collector (pin 7). this input can be used to adjust the input voltage offset or used to add hysteresis. if offset balancing or hysteresis is not used, the balance pins should be connected together with a 0.1f capacitor. v + (pin 8): positive supply voltage
lt1011/lt1011a 8 1011afe for more information www.linear.com/lt1011 a pplica t ions i n f or m a t ion preventing oscillation problems oscillation problems in comparators are nearly always caused by stray capacitance between the output and inputs or between the output and other sensitive pins on the comparator. this is especially true with high gain bandwidth comparators like the lt1011, which are designed for fast switching with millivolt input signals. the gain bandwidth product of the lt1011 is over 10ghz. oscillation problems tend to occur at frequencies around 5mhz, where the lt1011 has a gain of 2000. this implies that attenuation of output signals must be at least 2000:1 at 5mhz as measured at the inputs. if the source impedance is 1 k, the effective stray capacitance between output and input must have a reactance of more than (2000)(1k) = 2m, or less than 0.02 pf. the actual interlead capacitance between input and output pins on the lt1011 is less than 0.002pf when cut to printed circuit mount length. additional stray capacitance due to printed circuit traces must be minimized by routing the output trace directly away from input lines and, if possible, running ground traces next to input traces to provide shielding. additional steps to ensure oscillation-free operation are: 1. bypass the strobe/ balance pins with a 0.01 f capaci- tor connected from pin 5 to pin 6. this eliminates stray capacitive feedback from the output to the balance pins, which are nearly as sensitive as the inputs. 2. bypass the negative supply ( pin 4) with a 0.1 f ceramic capacitor close to the comparator . 0.1 f can also be used for the positive supply (pin 8) if the pull-up load is tied to a separate supply. when the pull-up load is tied directly to pin 8, use a 2 f solid tantalum bypass capacitor. 3. bypass any slow moving or dc input with a capaci- tor (0.01 f) close to the comparator to reduce high frequency source impedance. 4. keep resistive source impedance as low as possible. if a resistor is added in series with one input to balance source impedances for dc accuracy, bypass it with a capacitor. the low input bias current of the lt1011 usually eliminates any need for source resistance bal- ancing. a 5 k imbalance, for instance, will create only 0.25mv dc offset. 5. use hysteresis. this consists of shifting the input offset voltage of the comparator when the output changes state. hysteresis forces the comparator to move quickly through its linear region, eliminating oscillations by overdriving the comparator under all input conditions. hysteresis may be either ac or dc. ac techniques do not shift the apparent offset voltage of the compara- tor, but require a minimum input signal slew rate to be effective. dc hysteresis works for all input slew rates, but creates a shift in offset voltage dependent on the previous condition of the input signal. the circuit shown in figure 1 is an excellent compromise between ac and dc hysteresis. + ? + 3 7 1 5 6 8 lt1011 inputs 2f tant 4 2 ?15v c1 0.003f 0.1f 1011 f01 r2 15m 15v r l output figure 1. comparator with hysteresis
lt1011/lt1011a 9 1011afe for more information www.linear.com/lt1011 a pplica t ions i n f or m a t ion figure 2. input offset voltage vs time to last transition figure 3. limiting fault input currents this circuit is especially useful for general purpose comparator applications because it does not force any signals directly back onto the input signal source. instead, it takes advantage of the unique properties of the balance pins to provide extremely fast, clean output switching even with low frequency input signals in the millivolt range. the 0.003 f capacitor from pin 6 to pin 8 generates ac hysteresis because the voltage on the balance pins shifts slightly, depending on the state of the output. both pins move about 4 mv. if one pin (6) is bypassed, ac hysteresis is created. it is only a few millivolts referred to the inputs, but is sufficient to switch the output at nearly the maximum speed of which the comparator is capable. to prevent problems from low values of input slew rate, a slight amount of dc hysteresis is also used. the sensitivity of the balance pins to current is about 0.5 mv input referred offset for each microampere of balance pin current. the 15m resistor tied from output to pin 5 generates 0.5 mv dc hysteresis. the combination of ac and dc hysteresis creates clean oscillation- free switching with very small input errors. figure 2 plots input referred error versus switching frequency for the circuit as shown. note that at low frequencies, the error is simply the dc hysteresis, while at high frequencies, an addi- tional error is created by the ac hysteresis. the high frequency error can be reduced by reducing c h , but lower values may not provide clean switching with very low slew rate input signals. input protection the inputs to the lt1011 are particularly suited to general purpose comparator applications because large differential and/or common mode voltages can be tolerated without damage to the comparator. either or both inputs can be raised 40 v above the negative supply, independent of the positive supply voltage . internal forward biased diodes will conduct when the inputs are taken below the negative supply. in this condition, input current must be limited to 1ma. if very large ( fault) input voltages must be accom- modated, series resistors and clamp diodes should be used (see figure 3). time/frequency (s) 1 2 input offset voltage (mv) 3 4 5 6 10 100 1000 1011 f02 1 0 ?1 ?2 7 8 c8 to c6 = 0.003f (50khz) (5khz) output ?hi? to ?lo? output ?lo? to ?hi? ? + lt1011 r4* 300 r3* 300 3 2 inputs d1 to d4: 1n4148 may be eliminated for i fault 1ma select according to allowable fault current and power dissipation * ** r1** v + v ? r2** 8 d2 4 1011 f03 d4 d1 d3
lt1011/lt1011a 10 1011afe for more information www.linear.com/lt1011 a pplica t ions i n f or m a t ion the input resistors should limit fault current to a reasonable value (0.1 ma to 20 ma). power dissipation in the resis- tors must be considered for continuous faults, especially when the lt1011 supplies are off. one final caution: lightly loaded supplies may be forced to higher voltages by large fault currents flowing through d1-d4. r3 and r4 limit input current to the lt1011 to less than 1ma when the input signals are held below v C . they may be eliminated if r1 and r2 are large enough to limit fault current to less than 1ma. input slew rate limitations the response time of a comparator is typically measured with a 100 mv step and a 5 mv to 10 mv overdrive. unfor- tunately, this does not simulate many real world situations where the step size is typically much larger and overdrive can be significantly less. in the case of the lt1011, step size is important because the slew rate of internal nodes will limit response time for input step sizes larger than 1v. at 5 v step size, for instance, response time increases from 150 ns to 360 ns. see the curve response time vs input step size for more detail. if response time is critical and large input signals are ex- pected, clamp diodes across the inputs are recommended. the slew rate limitation can also affect performance when differential input voltage is low, but both inputs must slew quickly. maximum suggested common mode slew rate is 10v/s. strobing the lt1011 can be strobed by pulling current out of the strobe pin. the output transistor is forced to an off state, giving a hi output at the collector (pin 7). currents as low as 250 a will cause strobing, but at low strobe currents, strobe delay will be 200 ns to 300 ns. if strobe current is increased to 3 ma, strobe delay drops to about 60ns. the voltage at the strobe pin is about 150mv below v + at zero strobe current and about 2 v below v + for 3ma strobe current. do not ground the strobe pin. it must be current driven. figure 4 shows a typical strobe circuit. note that there is no bypass capacitor between pins 5 and 6. this maximizes strobe speed, but leaves the compara- tor more sensitive to oscillation problems for slow, low figure 4. typical strobe circuit figure 5. output transistor circuitry level inputs. a 1pf capacitor between the output and pin 5 will greatly reduce oscillation problems without reduc- ing strobe speed. dc hysteresis can also be added by placing a resistor from the output to pin 5. see step 5 under preventing oscillation problems. the pin (6) used for strobing is also one of the offset adjust pins. current flow into or out of pin 6 must be kept very low ( < 0.2a) when not strobing to prevent input offset voltage shifts. output transistor the lt1011 output transistor is truly floating in the sense that no current flows into or out of either the collector or emitter when the transistor is in the off state. the equivalent circuit is shown in figure 5. ? + lt1011 15v 5v r l 3k ttl or cmos drive (5v supply) output ?15 8 6 1 7 4 1011 f04 3 2 r1 170 r2 470 q1 v + d2 i 1 0.5ma 1011 f05 v ? d1 q2 emitter (gnd pin) collector (output) output transistor
lt1011/lt1011a 11 1011afe for more information www.linear.com/lt1011 a pplica t ions i n f or m a t ion in the off state, i 1 is switched off and both q1 and q2 turn off. the collector of q2 can be now held at any voltage above v C without conducting current, including voltages above the positive supply level. maximum voltage above v C is 50 v for the lt1011m and 40 v for the lt1011c/i. the emitter can be held at any voltage between v + and v C as long as it is negative with respect to the collector. in the on state, i 1 is connected, turning on q1 and q2. diodes d 1 and d 2 prevent deep saturation of q 2 to improve speed and also limit the drive current of q1. the r1/r2 divider sets the saturation voltage of q2 and provides turn- off drive. either the collector or emitter pin can be held at a voltage between v + and v C . this allows the remaining pin to drive the load. in typical applications, the emitter is connected to v C or ground and the collector drives a load tied to v + or a separate positive supply. when the emitter is used as the output, the collector is typically tied to v + and the load is connected to ground or v C . note that the emitter output is phase reversed with respect to the collector output so that the + and C input designations must be reversed. when the collector typical a pplica t ions offset balancing driving load referenced to positive supply driving load referenced to negative supply is tied to v + , the voltage at the emitter in the on state is about 2v below v + (see curves). input signal range the common mode input voltage range of the lt1011 is about 300mv above the negative supply and 1.5 v below the positive supply, independent of the actual supply voltages ( see curve in the typical performance characteristics). this is the voltage range over which the output will respond correctly when the common mode voltage is applied to one input and a higher or lower signal is applied to the remaining input. if one input is inside the common mode range and one is outside, the output will be correct. if the inputs are outside the common mode range in opposite directions, the output will still be correct. if both inputs are outside the common mode range in the same direction, the output will not respond to the differential input; for temperatures of 25 c and above, the output will remain unconditionally high ( collector output), for temperatures below 25c, the output becomes undefined. ? + lt1011 5 r2 3k r1 20k 6 7 8 2 3 1011 ta03 v + ? + lt1011 inputs* 2 7 r load 4 1 8 *input polarity is reversed when using pin 1 as output v v v + 3 1011 ta06 ? + lt1011 3 7 r load 4 1 8 v ++ can be greater or less than v + v v + v ++ v or ground 2 1011 ta05
lt1011/lt1011a 12 1011afe for more information www.linear.com/lt1011 typical a pplica t ions strobing driving ground referred load window detector using clamp diodes to improve frequency response* crystal oscillator noise immune 60hz line sync** high efficiency** motor speed controller ? + lt1011 2 7 6 note: do not ground strobe pin ttl strobe 1k 3 1011 ta04 ? + lt1011 inputs* 2 7 l1 4 1 8 v ? input polarity is reversed when using pin 1 as output v ++ may be any voltage above v ? . pin 1 swings to within 2v of v ++ * ** v ++** v + 3 1011 ta07 ? + lt1011 2 high limit low limit 7 v + r l output high inside ?window? and low above high limit or below low limit 1 3 v in 1011 ta08 ? + lt1011 2 7 1 3 ? + lt1011 2 r1 d2 voltage input 7 1011 ta09 output ground or low impedance reference 3 current mode input (dac, etc) d1 *see curve, ?response time vs input step size? ? + lt1011 2 7 1k 5v 10k 1 4 8 3 1011 ta10 50k out 10k 10k 100pf 85khz ? + lt1011 3 60hz input 7 5v r2 75k 5v 4 1 8 2 5v 1011 ta11 r3 1k output 60hz r4 27k * ** increase r1 for larger input voltages lt1011 self oscillates at 60hz causing it to ?lock? onto incoming line signal c1 0.22f r5 10k r6 27k r1* 330k 2v rms to 25v rms + ? + lt1011 2 15v ?5v to ?15v 0v to 10v input 8 3 c2* 0.1f r5 100k c3 0.1f r4 1k r3/c2 determines oscillation frequency of controller q1 operates in switch mode * ** r6 2k motor motor-tach globe 397a120-2 tach r7 1k 1011 ta12 r2 470 r1 1k r3* 10k 1n4002 c1 50f q1 2n6667 15v 1 7 4
lt1011/lt1011a 13 1011afe for more information www.linear.com/lt1011 typical a pplica t ions combining offset adjust and strobe direct strobe drive when cmos* logic uses same v + supply as lt1011 combining offset adjustment and hystersis low drift r/c oscillator ? positive peak detector negative peak detector ? + lt1011 6 1011 ta13 5 10k 1k ttl or cmos 5v 20k v + 3 2 ? + lt1011 6 *not applicable for ttl logic 1011 ta14 8 v + 3 2 ? + lt1011 5 7 1011 ta15 6 1 r l 20k r h * 5k v + hysteresis is 0.45mv/a of current change in r h this resistor causes hysteresis to be centered around v os * ** 2r h ** 3 2 ? + lt1011 2 ** 3 1 4 7 8 * ** ? 1% metal film trw type mtr-5/120ppm/c, 25k r s 200k c1: 0.015f = polystyrene, ?120ppm/c, 30ppm wesco type 32-p note: comparator contributes 10ppm/c drift for frequencies below 10khz low drift and accurate frequency are obtained because this configuration rejects effects due to input offset voltage and bias current of the comparator 1k 10k* 10k* 1011 ta16 15v 10k* 74hc04 6 buffered output 15v c1 0.015f 15v + 1 2 6 8 1011 ta17 output 3 7 8 15v 3 input *** 2k 1m** 2 4 c1* 2f ?15v 10k 100pf + ? lt1008 * ** *** mylar select for required reset time constant input polarity is reversed when using pin 1 as output ? + lt1011 + lt1011 1 2 6 8 1011 ta18 output 3 7 8 ? + 15v 3 2k 1m** 2 input 4 c1* 2f * ** mylar select for required reset time constant ?15v 10k 100pf ? + lt1008
lt1011/lt1011a 14 1011afe for more information www.linear.com/lt1011 typical a pplica t ions 4-digit (10,000 count) a/d converter capacitance to pulse width converter + + ? + lt1011 5v gain adj d1 2 8 4 d3 ? d2 ? 10f ? 1011 ta20 10f ? 6 0.01f r5 4.7k r3 86.6k ttl or cmos (operating on 5v) output 1s/pf 1 7 3 c** r2 100k r1 5k t h [c max (pf)][1s/pf] t l 10 ? c max ? (1s/pf) *pw = (r2 + r3)(c) ** typical 2 sections of 365pf variable capacitor when used as shaft angle indication ? these components may be eliminated if negative supply is available (?1v to ?15v) lt1011 is 6pf. this is an offset term. , input capacitance of ( ) r1 + r4 r1 ? + lt1011 7 6 1 8 2 3 4 ?15v 15v 15v input 0v to 10v c5 0.01f r5 4.7k r7 22 r11 6.8k clock 1mhz 5v r6 4.7k r2 18k r1 1k zero trim r9 3.65k r8 3k r10 1k full-scale trim r3 3.9k r4 5.6k c1* 0.1f c3 0.1f 2n3904 1011 ta19 r12 6.8k c6 50pf c2** 15pf d2 d1 d3 d4 lm329 * ** all diodes: 1n4148 polystyrene npo start 12ms 15v 6 3 7 4 8 1 2 5 ?15v 5v c4 0.01f 15v lf398 output = 1 count per mv, f = 1mhz
lt1011/lt1011a 15 1011afe for more information www.linear.com/lt1011 typical a pplica t ions 100khz precision rectifier fast settling filter ? + lt1011 ? + lt1011 4 2 3 3 2 8 8 7 1 15v ?15v 15v 5 6 6 4 ?15v 15v 5 7 1 5k 10k 1.5k 1f 3 8 6 output comparators drive opto-coupled fet ?on? when difference between output and input exceeds threshold. when output approaches input, the gate turns ?off? and low pass filtering occurs. *input polarity is reversed when using pin 1 as output input* 7 1 4 2 ofm-1a 1m 15v 5k threshold 100k 1011 ta21 0.1f v in 4.7k 4.7k 1m lt1008c 100pf ?15v 15v 100pf ? + lt1011 ?5v 5v 5v 5v ?5v 5v 820 ?5v 1011 ta23 5v 12k 1k rectified output ?5v 1 8 1k 7 74c04 74c04 4 2 ac input 3 5k zero cross trim 820 12k hp5082-2800 4 100 0.033f
lt1011/lt1011a 16 1011afe for more information www.linear.com/lt1011 s che m a t ic diagra m r1 1.3k offset r4 300 q5 d1 d2 r3 300 r23 4k r17 200 r2 1.3k r5 160 r27 3k r8 800 r9 800 r10 4k r11 170 r12 470 r24 400 r13 4 r6 3.2k r7 3.2k q3 q28 q30 q4 d5 q1 q2 q8 q9 q19 q20 q10 q11 q7 5 offset/strobe 6 v + 8 7 1 d4 d6 q29 q31 q6 input (+) q27 q25 q26 q21 q22 d3 r21 960 r14 4.8k r15 700 r16 800 r18 275 r19 500 r26 1.6k r25 1.6k q23 d7 2 input (?) 3 q18 q24 q17 v ? r20 940 r22 200 q16 4 q13 q15 output gnd 1011 sd q12 q14
lt1011/lt1011a 17 1011afe for more information www.linear.com/lt1011 h8 (to-5) 0.230 pcd 1197 0.050 (1.270) max 0.016 ? 0.021** (0.406 ? 0.533) 0.010 ? 0.045* (0.254 ? 1.143) seating plane 0.040 (1.016) max 0.165 ? 0.185 (4.191 ? 4.699) gauge plane reference plane 0.500 ? 0.750 (12.700 ? 19.050) 0.305 ? 0.335 (7.747 ? 8.509) 0.335 ? 0.370 (8.509 ? 9.398) dia lead diameter is uncontrolled between the reference plane and 0.045" below the reference plane for solder dip lead finish, lead diameter is 0.016 ? 0.024 (0.406 ? 0.610) * ** 0.230 (5.842) typ 0.027 ? 0.045 (0.686 ? 1.143) 0.028 ? 0.034 (0.711 ? 0.864) 0.110 ? 0.160 (2.794 ? 4.064) insulating standoff 45typ pin 1 p ackage descrip t ion obsolete package h package 8-lead to-5 metal can (.230 inch pcd) (reference ltc dwg # 05-08-1321) j8 1298 0.014 ? 0.026 (0.360 ? 0.660) 0.200 (5.080) max 0.015 ? 0.060 (0.381 ? 1.524) 0.125 3.175 min 0.100 (2.54) bsc 0.300 bsc (0.762 bsc) 0.008 ? 0.018 (0.203 ? 0.457) 0 ? 15 0.005 (0.127) min 0.405 (10.287) max 0.220 ? 0.310 (5.588 ? 7.874) 1 2 3 4 8 7 6 5 0.025 (0.635) rad typ 0.045 ? 0.068 (1.143 ? 1.727) full lead option 0.023 ? 0.045 (0.584 ? 1.143) half lead option corner leads option (4 plcs) 0.045 ? 0.065 (1.143 ? 1.651) note: lead dimensions apply to solder dip/plate or tin plate leads j8 package 8-lead cerdip (narrow .300 inch, hermetic) (reference ltc dwg # 05-08-1110) obsolete package please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings.
lt1011/lt1011a 18 1011afe for more information www.linear.com/lt1011 n8 1002 .065 (1.651) typ .045 ? .065 (1.143 ? 1.651) .130 .005 (3.302 0.127) .020 (0.508) min .018 .003 (0.457 0.076) .120 (3.048) min 1 2 3 4 8 7 6 5 .255 .015* (6.477 0.381) .400* (10.160) max .008 ? .015 (0.203 ? 0.381) .300 ? .325 (7.620 ? 8.255) .325 +.035 ?.015 +0.889 ?0.381 8.255 ( ) note: 1. dimensions are inches millimeters *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 inch (0.254mm) .100 (2.54) bsc p ackage descrip t ion n8 package 8-lead pdip (narrow .300 inch) (reference ltc dwg # 05-08-1510) s8 package 8-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) .016 ? .050 (0.406 ? 1.270) .010 ? .020 (0.254 ? 0.508) 45 0? 8 typ .008 ? .010 (0.203 ? 0.254) so8 0303 .053 ? .069 (1.346 ? 1.752) .014 ? .019 (0.355 ? 0.483) typ .004 ? .010 (0.101 ? 0.254) .050 (1.270) bsc 1 2 3 4 .150 ? .157 (3.810 ? 3.988) note 3 8 7 6 5 .189 ? .197 (4.801 ? 5.004) note 3 .228 ? .244 (5.791 ? 6.197) .245 min .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings.
lt1011/lt1011a 19 1011afe for more information www.linear.com/lt1011 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number d 10/12 update to product description addition of order information addition of pin function information correction to positive peak detector circuit 1 2, 3 7 13 e 4/13 correction to pin function descriptions correction to order information and obsolete packages correction to graphs: response timecollector output C high to low response time using gnd pin as output C low to high response time using gnd pin as output C high to low output saturationground output correction to input pin polarity 2, 7 3 5, 6 10, 13, 15 (revision history begins at rev d)
lt1011/lt1011a 20 1011afe for more information www.linear.com/lt1011 ? linear technology corporation 1991 lt 0413 rev e ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 o fax : (408) 434-0507 o www.linear.com/lt1011 r ela t e d p ar t s typical a pplica t ion 10hz to 100khz voltage to frequency converter part number description comments lt1016 ultrafast? precision comparator industry standard 10ns comparator lt1116 12ns single supply ground-sensing comparator single supply version of the lt1016 LT1394 ultrafast single supply comparator 7ns, 6ma single supply comparator lt1671 60ns, low power comparator 450a single supply comparator ultrafast is a trademark of linear technology corporation. ? + lt1011 3 2 6 c2 0.68f ?15v ?15v 15v 15v c1 0.002f polystyrene 15v 0.002f 15v q2 1011 ta22 q1* r9 5k 15v 15v 4 8 r5 2k r1 4.7k r15 22k r13 620k r14 1k 2f lt1009 2.5v r8 4.7k linearity 0.01% r6 2k r17 ? 22m 15v ?15v r16 50k 10hz trim * ? all diodes 1n4148 transistors 2n3904 used only to guarantee start-up may be increased for better 10hz trim resolution r4 1m r11 20k r7 4.7k 1 7 10pf ?15v r12 100k r10 2.7k 1.5s ttl output 10hz to 100khz + 4.4v ?15v 1.5s r3 8.06k input 0v to 10v r2 5k full-scale trim

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